The present invention relates generally to a digital-to-analog converter, and more particularly to a system and method for providing a calibrated digital-to-analog conversion.
Digital-to-analog conversion is a process for converting information from a digital signal into an analog signal such as a voltage or a current. The digital signal can usually be represented as a binary number. A binary number system represents numeric values using two symbols, typically 0 and 1. Binary numbers are characterized by their having a different weighting for each digit (or bit), such that each bit represents an order of magnitude greater value. For a binary number, the weighting of the bit often referred to as the significance of the bit, doubles for each digit. For example, bit 1 is twice the value of bit 0 and bit 2 is twice the value of bit 1.
FIG. 1A illustrates a conventional digital-analog converter (DAC) 100 implemented in a binary-coded R-2R scheme. The binary-coded R-2R DAC 100 uses a plurality of resistors 102 each having the same resistance arranged in a “ladder” network and a switch assembly 104 connected to a digital input 110. The switch assembly 104 controls multiple current sources, which are weighted to correspond to the weighting of the bits in the digital input 110. To operate the DAC 100, a digital input 110 is coupled to the switch assembly 104. The switch assembly 104 switches the corresponding currents to the resister ladder such that a voltage is developed at the output 112. The linearity of the DAC is dependent on matching the resistors in the ladder network. For example, if the resistance value of the resistors 102 varies between them, then the output signal may not be linear. Due to variations in the manufacturing processes, the resistance values are often mismatched, so the conventional DAC 100 is typically only used for up to 8-bit resolution.
FIG. 2 is a schematic diagram illustrating a conventional segmented DAC 200. The conventional segmented DAC 200 is a combination of the conventional binary-weighted DAC 100 shown in FIG. 1A and a fully-decoded thermometer decoder 220 connected to additional current sources (I7-I13) and a plurality of latches 230. To operate the segmented DAC 200, a plurality of digital input signals (b0-b9) are coupled to the latches 230. The latches 230 connect its 7 least significant digital input signals (b0-b6) to the switches 104 of the binary-coded R-2R ladder 100, and its 3 most significant digital input signals (b7-b9) to the thermometer decoder 220. The thermometer coder 220 controls 7 identical current sources (I7-I13), each for providing a current to the resister ladder. Because the current sources (I7-I13) is controlled by the thermometer decoder 220 that is fully decoded rather than binary weighted, the noise level will be lower on the DAC output 112.
Higher level (12 to 14-bit) resolution may be achieved with the segmented DAC 200. However, it also requires a more sophisticated layout scheme and a relatively large integrated circuit area. Additionally, segmented DACs may also require calibrating to correct for manufacturing variations and nonlinearity. For these reasons, it is desirable to have an effective calibration system and method for digital-to-analog conversion such that an acceptable digital-to-analog conversion may be accomplished using less integrated circuit area and without requiring extensive calibrating.